The present invention relates to random access memory for data storage. More specifically, the present invention relates to a method of fabricating a magnetic random access memory device including an array of spin dependent tunneling junction memory cells.
Magnetic Random Access Memory (xe2x80x9cMRAMxe2x80x9d) is a non-volatile memory that is being considered for long term data storage. A typical MRAM device includes an array of memory cells. Word lines extend along rows of the memory cells, and bit lines extend along columns of the memory cells. Each memory cell is located at a cross point of a word line and a bit line.
The memory cells may be spin dependent tunneling (xe2x80x9cSDT) junctions. A typical SDT junction has a pinned ferromagnetic layer, a sense ferromagnetic layer and an insulating tunnel barrier sandwiched between the ferromagnetic layers. The SDT junction exhibits tunneling magnetoresistance (xe2x80x9cTMRxe2x80x9d) in the presence of a magnetic field. Relative orientation and magnitude of spin polarization of the ferromagnetic layers determine the resistance of the SDT junction. Generally, resistance of the SDT junction is a first value R if the ferromagnetic layers have a xe2x80x9cparallelxe2x80x9d magnetization orientation, and the resistance is increased to a second value R+xcex94R if the magnetization orientation is changed from parallel to anti-parallel.
These two magnetization orientations, parallel and anti-parallel, represent logic values of xe2x80x9c0xe2x80x9d and xe2x80x9c1.xe2x80x9d The orientation may be changed from parallel to anti-parallel or vice-versa by applying the proper magnetic field to the SDT junction.
A logic value may be written to an SDT junction by setting the magnetization orientation to either parallel or anti-parallel. The logic value stored in the SDT junction may be read by sensing the resistance of the SDT junction.
Ideally, each memory cell retains its orientation of magnetization, even in the absence of external power. Therefore, ideal memory cells are non-volatile.
In practice, however, not all memory cells are ideal. In an MRAM memory device including thousands and thousands of SDT junction memory cells, certain SDT junctions will exhibit low resistance in a zero magnetic field. When a sufficient magnetic field is applied to such cells, they will switch from a low resistance to a high resistance. However, such cells will inadvertently switch back to the low resistance when the magnetic field is removed. Such SDT junctions are unusable.
Certain SDT junctions will switch from one magnetization orientation to the other in the presence of a sufficient magnetic field. However, these SDT junctions will not switch back in the presence of a magnetic field having equal magnitude but opposite polarity. Such SDT junctions can be unusable.
Some of the SDT junctions will be shorted. Shorted SDT junctions are also unusable.
Unusable SDT junctions reduce the storage capacity of MRAM devices. Large numbers of unusable SDT junctions result in the rejection of MRAM devices, and consequently, increase fabrication cost.
Resistance of the many SDT junctions across the device will not be uniform. Resistance of the SDT junctions might vary by as much as 30%. This makes it difficult for a read/write circuit to sense the change in resistance among multiple columns of memory cells. Consequently, complexity of the read/write circuit is increased in order to read the memory cells.
There is a need to improve the uniformity of resistance across MRAM devices. There is also a need to increase the usable number of SDT junctions in MRAM devices.
These needs are met by present invention. One aspect of the present invention is a method of fabricating a memory device including a plurality of magnetoresistive memory cells. The method includes the steps of forming a first ferromagnetic layer; flattening an exposed surface of the first layer; and forming a second ferromagnetic layer atop the first ferromagnetic layer such that the first and second ferromagnetic layers are ferromagnetically coupled. Flattening the exposed surface reduces the ferromagnetic coupling between the first and second ferromagnetic layers.
This method may be applied to MRAM devices including SDT junction memory cells. Steps for fabricating such MRAM devices include depositing a first ferromagnetic layer; and flattening an exposed surface of the first layer. The exposed surface is flattened prior to depositing other layers atop the first ferromagnetic layer.